Digital Control for Power Factor Correction

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dc.contributor.authorXie, Manjingen
dc.contributor.committeechairLee, Fred C.en
dc.contributor.committeememberMartin, Thomas L.en
dc.contributor.committeememberHuang, Alex Q.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:42:14Zen
dc.date.adate2003-08-21en
dc.date.available2014-03-14T20:42:14Zen
dc.date.issued2003-06-27en
dc.date.rdate2003-08-21en
dc.date.sdate2003-07-30en
dc.description.abstractThis thesis focuses on the study, implementation and improvement of a digital controller for a power factor correction (PFC) converter. The development of the telecommunications industry and the Internet demands reliable, cost-effective and intelligent power. Nowadays, the telecommunication power systems have output current of up to several kilo amperes, consisting of tens of modules. The high-end server system, which holds over 100 CPUs, consumes tens of kilowatts of power. For mission-critical applications, communication between modules and system controllers is critical for reliability. Information about temperature, current, and the total harmonic distortion (THD) of each module will enable the availability of functions such as dynamic temperature control, fault diagnosis and removal, and adaptive control, and will enhance functions such as current sharing and fault protection. The dominance of analog control at the modular level limits system-module communications. Digital control is well recognized for its communication ability. Digital control will provide the solution to system-module communication for the DC power supply. The PFC converter is an important stage for the distributed power system (DPS). Its controller is among the most complex with its three-loop structure and multiplier/divider. This thesis studies the design method, implementation and cost effectiveness of digital control for both a PFC converter and for an advanced PFC converter. Also discussed is the influence of digital delay on PFC performance. A cost-effective solution that achieves good performance is provided. The effectiveness of the solution is verified by simulation. The three level PFC with range switch is well recognized for its high efficiency. The range switch changes the circuit topology according to the input voltage level. Research literature has discussed the optimal control for both range-switch-off and range-switch-on topologies. Realizing optimal analog control requires a complex structure. Until now optimal control for the three-level PFC with analog control has not been achieved. Another disadvantage of the three-level PFC is the output capacitor voltage imbalance. This thesis proposes an active balancing solution to solve this problem.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-07302003-111145en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-07302003-111145/en
dc.identifier.urihttp://hdl.handle.net/10919/34258en
dc.publisherVirginia Techen
dc.relation.haspartFinalthesis.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectactive balancingen
dc.subjectpower factor correctionen
dc.subjectdigital controlen
dc.subjectfeed forwarden
dc.subjectthree-level PFCen
dc.subjectswitch-mode power supplyen
dc.titleDigital Control for Power Factor Correctionen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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