Browsing by Author "Li, Qiang"

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    48V/1V Voltage Regulator for High-Performance Microprocessors
    Lou, Xin (Virginia Tech, 2024-06-07)
    The data center serves as the hardware foundation for artificial intelligence (AI) and cloud computing, constituting a global market that has surpassed $200 billion and is experiencing rapid growth. It is estimated that data centers contribute to 1.7-2.2% of the world's electricity generation. Conversely, up to 80% of the long-term operational expenditure of data centers is allocated to electricity consumption. Consequently, enhancing the efficiency of electric energy conversion in data centers is not only economically advantageous but also crucial for achieving carbon-neutral objectives. Through collaborative efforts between the industrial and academic sectors, substantial advancements have been achieved in the energy conversion efficiency of data centers. Most converters within the data center power architecture now boast efficiencies exceeding 99%. However, the bottleneck for further improvements in system efficiency lies in the voltage regulator modules (VRMs), which grapple with challenges such as high conversion ratios, elevated output currents, and substantial load transients. These challenges are particularly pronounced for AI processors and graphics processing units (GPUs), given their heightened power demands compared to conventional central processing units (CPUs). To enhance system efficiency, a revolutionary shift in power architecture has been introduced, advocating for the adoption of a 48 V data center power architecture to replace the conventional 12 V architecture. The higher 48 V bus voltage significantly reduces distribution loss on the bus. However, the primary challenge lies in managing high step-down voltage conversion while maintaining high efficiency. Additionally, high-performance microprocessors, including CPUs, GPUs, application-specific integrated circuits (ASICs), and field-programmable gate arrays (FPGAs), require hundreds of amperes of current at low voltage levels (e.g., GPUs need >220 A at <1.85 V, CPUs need >1000 A at <1.0 V). An unavoidable consequence of upscaling processor current and size is the substantial resistive loss in VRMs. This is because such loss scales with the square of the current [I2R], and the power path area (and resistance R) expands with the processor size. The Power Delivery Network (PDN) resistance in the "last inch" of the power delivery path is becoming a limiting factor in processor performance and system efficiency. The key to reducing the I2R loss is minimizing the distance between the VRMs and processors by utilizing ultra-high power density VRMs. Furthermore, the design of Voltage Regulator Modules (VRMs) for high-performance microprocessors encounters additional formidable challenges, especially when dealing with the requirements of contemporary computing architectures. The key hurdles encompass achieving high efficiency, handling low output voltage, accommodating wide voltage ranges, managing elevated output currents, and addressing significant load transients. These challenges prompt both academia and industry to explore novel topologies, innovative magnetic integration methods, and advanced control strategies. The prevailing trend in state-of-the-art 48V solutions centers around the adoption of two-stage configurations, wherein the second stage can leverage conventional 12V solutions. However, this approach imposes limitations on power density and efficiency, given that power traverses two cascaded DC/DC converters. Additionally, the footprint of decoupling capacitors and I2R loss on the intermedia bus between the two stages is emerging as a noteworthy consideration in designs. In response to these challenges, a novel proposition introduces a single-stage 48V coupled-transformer voltage regulator (CTVR) tailored for high-performance microprocessors. This innovative design aims to deliver ultra-high power density and superior efficiency. The converter employs a unique magnetic structure that integrates transformers and coupled inductors from multiple current-doubler rectifiers. Significantly, by utilizing the magnetizing inductors of transformers as output inductors, there is a substantial reduction in the size of magnetic components. Various implementations are explored, each addressing specific design objectives. Initially, a single-stage coupled-transformer voltage regulator (CTVR) with discrete magnetics is presented, offering a 48V solution while maintaining a comparable size and cost to a state-of-the-art 12V multiphase buck regulator. Leveraging the indirect-coupling concept, magnetic components are standardized, enabling scalability and facilitating multiphase operation. A prototype is constructed and tested to validate the CTVR's performance. With a 48V input and 1.8V output, the peak efficiency registers at 92.1%, and the power area density is 0.45 W/mm2. However, voltage ringing is observed in both primary and secondary switches due to a larger leakage inductance and hard-switching operation. Subsequently, a transition to soft-switching operation is implemented to address the voltage ringing issue. The leakage inductance is intentionally designed to supply energy for zero-voltage switching (ZVS) of primary switches, turning the previously perceived drawback into an opportunity for efficiency improvement. As a result, testing demonstrates a peak efficiency increase of more than 1%, reaching 93.6%. Furthermore, efforts are made to enhance small leakage inductance by employing well-interleaved printed circuit board (PCB) windings. Following a series of design optimizations, the prototype achieves a peak efficiency of 93.1% and a remarkable power density of 1037 W/in3, accounting for gate driver loss and size. Despite an increase in cost associated with PCB windings, this proposed solution attains the highest power density and stands as the pioneering 48V single-stage design surpassing 1000 W/in3 power density. When prioritizing efficiency in the design, the quasi-parallel Sigma converter emerges as another optimal choices for a 48V solution. However, the intricate and distinctive quasi-parallel structure of the Sigma converter necessitates a thorough examination of its control mechanism, particularly in light of the rapid load transient response requirements. To address this, an adaptive voltage positioning (AVP) design for the Sigma converter is introduced, employing enhanced V2 control. Guidelines and limitations are provided to stabilize the converter and enhance its overall performance. Ultimately, the AVP function and load transient performance are substantiated through simulation and experimental results.
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    6.78MHz Omnidirectional Wireless Power Transfer System for Portable Devices Application
    Feng, Junjie (Virginia Tech, 2021-01-11)
    Wireless power transfer (WPT) with loosely coupled coils is a promising solution to deliver power to a battery in a variety of applications. Due to its convenience, wireless power transfer technology has become popular in consumer electronics. Thus far, the majority of the coupled coils in these systems are planar structure, and the magnetic field induced by the transmitter coil is in one direction, meaning that the energy power transfer capability degrades greatly when there is some angle misalignment between the coupled coils. To improve the charging flexibility, a three–dimensional (3D) coils structure is proposed to transfer energy in different directions. With appropriate modulation current flowing through each transmitter coil, the magnetic field rotates in different directions and covers all the directions in 3D space. With omnidirectional magnetic field, the charging platform can provide energy transfer in any direction; therefore, the angle alignment between the transmitter coil and receiver coil is no longer needed. Compensation networks are normally used to improve the power transfer capability of a WPT system with loosely coupled coils. The resonant circuits, formed by the loosely coupled coils and external compensation inductors or capacitors, are crucial in the converter design. In WPT system, the coupling coefficient between the transmitting coil and the receiving coil is subject to the receiver's positioning. The variable coupling condition is a big challenge to the resonant topology selection. The detailed requirements of the resonant converter in an omnidirectional WPT system are identified as follows: 1). coupling independent resonant frequency; 2). load independent output voltage; 3). load independent transmitter coil current; 4). maximum efficiency power transfer; 5). soft switching of active devices. A LCCL-LC resonant converter is derived to satisfy all of the five requirements. In consumer electronics applications, Megahertz (MHz) WPT systems are used to improve the charging spatial freedom. 6.78 MHz is selected as the system operation in AirFuel standard, a wireless charging standard for commercial electronics. The zero voltage switching (ZVS) operation of the switching devices is essential in reducing the switching loss and the switching related electromagnetic interference (EMI) issue in a MHz system; therefore, a comprehensive evaluation of ZVS condition in an omnidirectional WPT system is performed. And a design methodology of the LCCL-LC converter to achieve ZVS operation is proposed. The big hurdle of the WPT technology is the safety issue related to human exposure of electromagnetic fields (EMF). A double layer shield structure, including a magnetic layer and a conductive layer, is proposed in a three dimensional charging setup to reduce the stray magnetic field level. A parametric analysis of the double shield structure is conducted to improve the attenuation capability of the shielding structure. In an omnidirectional WPT system, the energy can be transferred in any direction; however the receiving devices has its preferred field direction based on its positioning and orientation. To focus power transfer towards targeted loads, a smart detection algorithm for identifying the positioning and orientation of receiver devices based on the input power information is presented. The system efficiency is further improved by a maximum efficiency point tracking function. A novel power flow control with a load combination strategy to charge multiple loads simultaneously is explained. The charging speed of the omnidirectional WPT system is greatly improved with proposed power flow control.
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    Accurate Small-Signal Modeling for Resonant Converters
    Hsieh, Yi-Hsun (Virginia Tech, 2020-11-24)
    In comparison with PWM converters, resonant converters are gaining increasing popularity for cases in which efficiency and power density are at a premium. However, the lack of an accurate small-signal model has become an impediment to performance optimization. Many modeling attempts have been made to date. Besides the discrete time-domain modeling, most continuous-time modeling approaches are based on fundamental approximation, and are thus unable to provide sufficient accuracy for practical use. An equivalent circuit model was proposed by Yang, which works well for series resonant converters (SRCs) with high Q (quality factor), but which is inadequate for LLC resonant converters. Furthermore, the model is rather complicated, with system orders that are as high as five and seven for the SRC and LLC converter, respectively. The crux of the modeling difficulty is due to the underlying assumption based on the use of a band-pass filter for the resonant tank in conjunction with a low-pass output filter, which is not the case for most practical applications. The matter is further complicated by the presence of a rectifier, which is a nonlinearity that mixes and matches the original modulation frequency. Thus, the modulation signal becomes intractable when using a frequency-domain modeling approach. This dissertation proposes an extended describing function modeling that is based on a Fourier analysis on the continuous-time-domain waveforms. Therefore, all important contributions from harmonics are taken into account. This modeling approach is demonstrated on the frequency-controlled SRC and LLC converters. The modeling is further extended to, with great accuracy, a charge-controlled LLC converter. In the case of frequency control, a simple third-order equivalent circuit model is provided with high accuracy up to half of the switching frequency. The simplified low-frequency model consists of a double pole and a pair of right-half-plane (RHP) zeros. The double pole, when operated at a high switching frequency, manifests the property of a well-known beat frequency between the switching frequency and the resonant frequency. As the switching frequency approaches the resonant frequency of the tank, a new pair of poles is formed, representing the interaction of the resonant tank and the output filter. The pair of RHP zeros, which contributes to additional phase delay, was not recognized in earlier modeling attempts. In the case of charge control, a simple second-order equivalent circuit model is provided. With capacitor voltage feedback, the order of the system is reduced. Consequently, the resonant tank behaves as an equivalent current source and the tank property is characterized by a single pole. The other low-frequency pole represents the output capacitor and the load. However, the capacitor voltage feedback cannot eliminate the high-frequency poles and the RHP zeros. These RHP zeros may be an impediment for high-bandwidth design if not properly treated. Based on the proposed model, these unwanted RHP zeros can be mitigated by either changing the resonant tank design or by proper feedback compensation. The accurate model is essential for a high-performance high-bandwidth LLC converter.
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    Active Source Management to Maintain High Efficiency in Resonant Conversion over Wide  Load Range
    Danilovic, Milisav (Virginia Tech, 2015-09-18)
    High-frequency and large amplitude current is a driving requirement for applications such as induction heating, wireless power transfer, power amplifier for magnetic resonant imaging, electronic ballasts, and ozone generators. Voltage-fed resonant inverters are normally employed, however, current-fed (CF) resonant inverters are a competitive alternative when the quality factor of the load is significantly high. The input current of a CF resonant inverter is considerably smaller than the output current, which benefits efficiency. A simple, parallel resonant tank is sufficient to create a high-power sinusoidal signal at the output. Additionally, input current is limited at the no-load condition, providing safe operation of the system. Drawbacks of the CF resonant inverter are associated with the implementation of the equivalent current source. A large input inductor is required to create an equivalent dc current source, to reduce power density and the bandwidth of the system. For safety, a switching stage is implemented using bidirectional voltage-blocking switches, which consist of a series connection of a diode and a transistor. The series diode experiences significant conduction loss because of large on-state voltage. The control of the output current amplitude for constant-frequency inverters requires a pre-regulation stage, typically implemented as a cascaded hard-switched dc/dc buck converter. The pre-regulation also reduces the efficiency. In this dissertation, a variety of CF resonant inverters with two input inductors and two grounded switches are investigated for an inductive-load driver with loaded quality factor larger than ten, constant and high-frequency (~500 kHz) operation, high reactive output power (~14 kVA), high bandwidth (~100 kHz), and high efficiency (over 95 %). The implementation of such system required to question the fundamental operation of the CF resonant inverter. The input inductance is reduced by around an order of magnitude, ensuring sufficient bandwidth, and allowing rich harmonic content in the input current. Of particular importance are fundamental and second harmonic components since they influence synchronization of the zero-crossing of the output voltage and the turn-on of the switches. The synchronization occurs at a particular frequency, termed synchronous frequency, and it allows for zero switching loss in the switches, which greatly boosts efficiency. The synchronous conditions were not know prior this work, and the dependence among circuit parameters, input current harmonics, and synchronous frequency are derived for the first time. The series diode of the bidirectional switch can reduce the efficiency of the system to below 90 %, and has to be removed from the system. The detrimental current-spikes can occur if the inverter is not operated in synchronous condition, such as in transients, or during parametric variations of the load coil. The resistance of the load coil has a wide variance, five times or more, while the inductance changes as well by a few percent. To accommodate for non-synchronous conditions, a low-loss current snubber is proposed as a safety measure to replace lossy diodes. The center-piece of the dissertation is the proposal of a two-phase zero-voltage switching buck pre-regulator, as it enables fixed frequency and synchronous operation of the inverter under wide parametric variations of the load. The synchronous operation is controlled by phase-shifting the switching functions of the pre-regulator and inverter. The pre-regulator reduces the dc current in the input inductors, which is a main contributor to current stress and conduction losses in the inverter switches. Total loss of the inverter switches is minimized since no switching loss is present and minimal conduction losses are allowed. The dc current in the input inductors, once seen as a means to transfer power to load, is now contradictory perceived as parasitic, and the power is transferred to the load using a fundamental frequency harmonic! The input current to the resonant tank, previously designed to be a square-wave, now resembles a sine-wave with very rich harmonic content. Additionally, the efficiency of the pre-regulator at heavy-load condition is improved by ensuring ZVS for with an additional inductive tank. The dissertation includes five chapters. The first chapter is an introduction to current-fed resonant inverters, applications, and state-of-the-art means to ensure constant frequency operation under load's parametric variations. The second chapter is dedicated to the optimization of the CF resonant inverter topology with a dc input voltage, two input inductors, and two MOSFETs. The topology is termed as a boost amplifier. If the amplifier operates away from the synchronous frequency, detrimental current spikes will flow though the switches since the series diodes are eliminated. Current spikes reduce the efficiency up to few percent and can create false functioning of the system. Operation at the synchronous frequency is achieved with large, bulky, input inductors, typically around 1-2 mH or higher, when the synchronous frequency follows the resonant frequency of the tank at 500 kHz. The input inductance cannot be reduced arbitrarily to meet the system bandwidth requirement, since the synchronous frequency is increased based on the inductance value. The relationship between the two (input inductance and the synchronous frequency) was unknown prior this work. The synchronous frequency is determined to be a complicated mathematical function of harmonic currents through the input inductors, and it is found using the harmonic decomposition method. As a safety feature, a current snubber is implemented in series with the resonant tank. Snubber utilizes a series inductance of cable connection between the tank and the switching stage, and it is more efficient than the previously employed series diodes. Topology optimization and detailed design procedure are provided with respect to efficiency and system dynamics. The mathematics is verified by a prototype rated at 14 kVA and 1.25 kW. The input inductance is reduced by around an order of magnitude, with the synchronous frequency increase of 2 %. The efficiency of the power amplifier reached 98.5 % and might be improved further with additional optimization. Silicon carbide MOSFETs are employed for their capability to operate efficiently at high frequency, and high temperature. The third chapter is dedicated to the development of the boost amplifier's large signal model using the Generalized State-space Averaging (GSSA) method. The model accurately predicts amplifier's transient and steady-state operation for any type of input voltage source (dc, dc with sinusoidal ripple, pulse-width modulated), and for either synchronous or non-synchronous operating frequency. It overcomes the limitation of the low-frequency model, which works well only for dc voltage-source input and at synchronous frequency. As the measure of accuracy, the zero-crossing of the resonant voltage is predicted with an error less than 2° over a period of synchronous operation, and for a range of interest for input inductance (25 μH – 1000 μH) and loaded-quality factor (10 – 50). The model is validated both in simulation and hardware for start-up transient and steady-state operation. It is then used in the synthesis of modulated output waveforms, including Hann-function and trapezoidal-function envelopes of the output voltage/current. In the fourth chapter, the GSSA model is employed in development of the PWM compensation method that ensures synchronous operation at constant frequency for the wide variation of the load. The boost amplifier is extended with a cascaded pre-regulator whose main purpose is to control the output resonant voltage. The pre-regulator is implemented as two switching half-bridges with same duty-cycle and phase-shift of 180°. The behavior of the cascaded structure is the same as of the buck converter, so the half-bridges are named buck pre-regulators. ZVS operation is ensured by putting an inductive tank between the half-bridges. Each output of half-bridges is connected to each of input inductors of the boost to provide the PWM excitation. Using the GSSA model, the synchronous condition and control laws are derived for the amplifier. Properties of the current harmonics in the input inductors are well examined. It is discovered that the dc harmonic, once used to transfer power, is unwanted (parasitic) since it increases conduction loss in switches of the boost. A better idea is to use the fundamental harmonic for power transfer, since it does not create loss in the switches. Complete elimination of the dc current is not feasible for constant frequency operation of the amplifier since the dc current depends on the load coil's resistance. However, significant mitigation of around 55 % is easily achievable. The proposed method improves significantly the efficiency of both the buck pre-regulator and the boost. Synchronous operation is demonstrated in hardware for fixed switching frequency of 480 kHz, power level up to 750 W, input voltage change from 300 V to 600 V, load coil's resistance change of three times, and load coil's inductance change of 3.5 %. Measured efficiency is around 95 %, with a great room for improvements. Chapter five summarizes key contributions and concludes the dissertation.
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    Automotive Lead-Acid Battery State-of-Health Monitoring System
    Kerley, Ross Andrew (Virginia Tech, 2014-09-05)
    This thesis describes the development of a system to continuously monitor the battery in a car and warn the user of an upcoming battery failure. An automotive battery endures enormous strain when it starts the engine, and when it supplies loads without the engine running. Note that the current during a cranking event often exceeds 500 Amperes. Despite the strains, a car battery still typically lasts 4-6 years before requiring replacement. There is often no warning of when a battery should be replaced and there is never a good time for a battery failure. All currently available lead-acid battery monitoring systems use voltage and current sensing to monitor battery impedance and estimate battery health. However, such a system is costly due to the current sensor and typically requires an expert to operate the system. This thesis describes a prototype system to monitor battery state of health and provide advance warning of an upcoming battery failure using only voltage sensing. The prototype measures the voltage during a cranking event and determines if the battery is healthy or not. The voltage of an unhealthy battery will drop lower than a healthy one, and it will not recover as quickly. The major contributions of the proposed research to the field are an algorithm to predict automotive battery state-of-health that is temperature-dependent and a prototype implementation of the algorithm on an ARM processor development board.
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    Avoiding internal switching loss in soft switching cascode structure device
    (United States Patent and Trademark Office, 2017-08-15)
    In a cascode switching device, avalanche breakdown of a control transistor and loss of soft switching or zero voltage switching in a high voltage normally-on depletion mode transistor having a negative switching threshold voltage and the corresponding losses are avoided by providing additional capacitance in parallel with a parallel connection of drain-source parasitic capacitance of the control transistor and gate-source parasitic capacitance of the high voltage, normally-on transistor to form a capacitive voltage divider with the drain-source parasitic capacitance of the high voltage, normally-on transistor such that the avalanche breakdown voltage of the control transistor cannot be reached. The increased capacitance also assures that the drain source parasitic capacitance of the high voltage, normally-on transistor is fully discharged before internal turn-on can occur.
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    Characterization and Application of Wide-Band-Gap Devices for High Frequency Power Conversion
    Liu, Zhengyang (Virginia Tech, 2017-06-08)
    Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide-band-gap (WBG) material based power semiconductor devices are considered as gaming changing devices which can exceed the limit of silicon (Si) and be used to pursue groundbreaking high-frequency, high-efficiency, and high-power-density power conversion. The switching performance of cascode GaN HEMT is studied at first. An accurate behavior-level simulation model is developed with comprehensive consideration of the impacts of parasitics. Then based on the simulation model, detailed loss breakdown and loss mechanism analysis are studied. The cascode GaN HEMT has high turn-on loss due to the reverse recovery charge and junction capacitor charge, and the common source inductance (CSI) of the package; while the turn-off loss is extremely small attributing to unique current source turn off mechanism of the cascode structure. With this unique feature, the critical conduction mode (CRM) soft switching technique is applied to reduce the dominant turn on loss and significantly increase converter efficiency. The switching frequency is successfully pushed to 5MHz while maintaining high efficiency and good thermal performance. Traditional packaging method is becoming a bottle neck to fully utilize the advantages of GaN HEMT. So an investigation of the package influence on the cascode GaN HEMT is also conducted. Several critical parasitic inductance are identified, which cause high turn on loss and high parasitic ringing that may lead to device failure. To solve the issue, the stack-die package is proposed to eliminate all critical parasitic inductance, and as a result, reducing turn on loss by half and avoiding potential failure mode of the cascode GaN device effectively. Utilizing soft switching and enhanced packaging, a GaN-based MHz totem-pole PFC rectifier is demonstrated with 99% peak efficiency and 700 W/in3 power density. The switching frequency of the PFC is more than ten times higher than the state-of-the-art industry product while it achieves best possible efficiency and power density. Integrated power module and integrated PCB winding coupled inductor are all studied and applied in this PFC. Furthermore, the technology of soft switching totem-pole PFC is extended to a bidirectional rectifier/inverter design. By using SiC MOSFETs, both operating voltage and power are dramatically increased so that it is successfully applied into a bidirectional on-board charger (OBC) which achieves significantly improved efficiency and power density comparing to the best of industrial practice. In addition, a novel 2-stage system architecture and control strategy are proposed and demonstrated in the OBC system. As a continued extension, the critical mode based soft switching rectifier/inverter technology is applied to three-phase AC/DC converter. The inherent drawback of critical mode due to variable frequency operation is overcome by the proposed new modulation method with the idea of frequency synchronization. It is the first time that a critical mode based modulation is demonstrated in the most conventional three phase H-bridge AC/DC converter, and with 99% plus efficiency at above 300 kHz switching frequency.
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    Characterization and Failure Mode Analysis of Cascode GaN HEMT
    Liu, Zhengyang (Virginia Tech, 2014-07-16)
    Recent emerging gallium nitride (GaN) high electron mobility transistor (HEMT) is expected to be a promising candidate for high frequency power conversion techniques. Due to the advantages of the material, the GaN HEMT has a better figure of merit (FOM) compared to the state-of-the-art silicon (Si) power metal oxide silicon field effect transistor (MOSFET), which allows the GaN HEMT to switch with faster transition and lower switching loss. By applying the GaN HEMT in a circuit design, it is possible to achieve high frequency, high efficiency, and high density power conversion at the same time. To characterize the switching performance of the GaN HEMT, an accurate behavior-level simulation model is developed in this thesis. The packaging related parasitic inductance, including both self-inductance and mutual-inductance, are extracted based on finite element analysis (FEA) methods. Then the accuracy of the simulation model is verified by a double-pulse tester, and the simulation results match well with experiment in terms of both device switching waveform and switching energy. Based on the simulation model, detailed loss breakdown and loss mechanism analysis are made. The cascode GaN HEMT has high turn-on loss due to the body diode reverse recovery of the low voltage Si MOSFET and the common source inductance (CSI) of the package; while the turn-off loss is extremely small attributing to the cascode structure. With this unique feature, the critical conduction mode (CRM) soft switching technique are applied to reduce the dominant turn on loss and increase converter efficiency significantly. The switching frequency is successfully pushed to 5MHz while maintaining high efficiency and good thermal performance. Traditional packaging method is becoming a bottle neck to fully utilize the advantages of GaN HEMT. So an investigation of the package influence on the cascode GaN HEMT is also conducted. Several critical parasitic inductors are identified, which cause high turn on loss and high parasitic ringing which may lead to device failure. To solve the issue, the stack-die package is proposed to eliminate all critical parasitic inductors, and as a result, reducing turn on loss by half and avoiding potential failure mode of the cascode GaN device effectively. Utilizing the proposed stack-die package and ZVS soft switching, the GaN HEMT high frequency, high efficiency, and high density power conversion capability can be further extended to a higher level.
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    Circuit and method for driving synchronous rectifiers for high-frequency flyback converters
    (United States Patent and Trademark Office, 2017-11-07)
    A voltage waveform similar to a waveform of a magnetizing current of an isolation transformer and immune to high frequency oscillatory resonant behavior is developed across a capacitor of a series resistor and capacitor connection connected in parallel with a synchronous rectifier. A simple logic circuit produces a waveform for controlling the synchronous rectifier which is not subject to significant turn on delay or early turn off caused by oscillatory resonances among parasitic inductances and capacitances. Improved timing accuracy of a synchronous converter provides improved power converter accuracy, particularly for flyback converters which are commonly used in converters for supplying power to offline electrical devices but are subject to oscillatory resonant behaviors that cannot be adequately damped at switching frequencies sufficiently high to support miniaturization of adapters.
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    Class-E Current Source Power Conversion
    Li, Bo (Virginia Tech, 2024-09-16)
    Current source is used in auxiliary power supplies, battery chargers, and LED drivers. The battery chargers are required to provide constant current within a wide output voltage range, similar to LED drivers. The load-independent (LI) Class-E inverter is a promising topology for such applications since it can realize zero-voltage switching (ZVS) within a wide load range. Class-E current source can be achieved by converting constant voltage (CV) Class-E inverter to current source with a trans-susceptance network or using parallel resonant topology. The design and analysis of LI Class-E inverters usually assume a high-Q resonant load tank so that the load current/voltage is sinusoidal. While this is the case in RF applications, it's not required in DC-DC power conversion. Besides, high-Q design leads to high inductance and increased voltage/current stress on the resonant components, increasing converter volume, loss, and cost. This work aims to provide a design guideline for the CC Class-E inverter when significant harmonics are present by reflecting the trade-off between load range and voltage stress, with the help of a modified frequency domain analysis method to eliminate the iteration existing in the time domain analysis. Output current variation and voltage stress can be automatically quantified when circuit parameters vary. Generalized load range contours are obtained to guide the circuit design. With the help of the analysis, a 10-W dual-output Class-E gate power supply is designed with optimized magnetics and reduced isolation capacitance. Compared with CC Class-E based on trans-susceptance network, the parallel resonant CC Class-E inverter has smaller part counts due to its low-order resonant network. However, the current topology suffers from limited maximum output power. In this work, a coupled-inductor based parallel resonant CC Class-E inverter is proposed with more than 2 times maximum power without increasing part counts.
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    Conducted EMI Noise Prediction and Filter Design Optimization
    Wang, Zijian (Virginia Tech, 2016-10-04)
    Power factor correction (PFC) converter is a species of switching mode power supply (SMPS) which is widely used in offline frond-end converter for the distributed power systems to reduce the grid harmonic distortion. With the fast development of information technology and multi-media systems, high frequency PFC power supplies for servers, desktops, laptops and flat-panel TVs, etc. are required for more efficient power delivery within limited spaces. Therefore the critical conduction mode (CRM) PFC converter has been becoming more and more popular for these information technology applications due to its advantages in inherent zero-voltage soft switching (ZVS) and negligible diode reverse recovery. With the emerging of the high voltage GaN devices, the goal of achieving soft switching for high frequency PFC converters is the top priority and the trend of adopting the CRM PFC converter is becoming clearer. However, there is the stringent electromagnetic interference (EMI) regulation worldwide. For the CRM PFC converter, there are several challenges on meeting the EMI standards. First, for the CRM PFC converter, the switching frequency is variable during the half line cycle and has very wide range dependent on the AC line RMS voltage and the load, which makes it unlike the traditional constant-frequency PFC converter and therefore the knowledge and experience of the EMI characteristics for the traditional constant-frequency PFC converter cannot be directly applied to the CRM PFC converter. Second, for the CRM PFC converter, the switching frequency is also dependent on the inductance of the boost inductor. It means the EMI spectrum of the CRM PFC converter is tightly related the boost inductor selection during the design of the PFC power stage. Therefore, unlike the traditional constant-frequency PFC converter, the selection of the boost inductor is also part of the EMI filter design process and EMI filter optimization should begin at the same time when the power stage design starts. Third, since the EMI filter optimization needs to begin before the proto-type of the CRM PFC converter is completed, the traditional EMI-measurement based EMI filter design will become much more complex and time-consuming if it is applied to the CRM PFC converter. Therefore, a new methodology must be developed to evaluate the EMI performance of the CRM PFC converter, help to simplify the process of the EMI filter design and achieve the EMI filter optimization. To overcome these challenges, a novel mathematical analysis method for variable frequency PFC converter is thus proposed in this dissertation. Based on the mathematical analysis, the quasi-peak EMI noise, which is specifically required in most EMI regulation standards, is investigated and accurately predicted for the first time. A complete approximate model is derived to predict the quasi-peak DM EMI noise for the CRM PFC converter. Experiments are carried out to verify the validity of the prediction. Based on the DM EMI noise prediction, worst case analysis is carried out and the worst DM EMI noise case for all the input line and load conditions can be found to avoid the overdesign of the EMI filter. Based on the discovered worst case, criteria to ease the DM EMI filter design procedure of the CRM boost PFC are given for different boost inductor selection. Optimized design procedure of the EMI filter for the front-end converter is then discussed. Experiments are carried out to verify the validity of the whole methodology.
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    A Constant ON-Time 3-Level Buck Converter for Low Power Applications
    Cassidy, Brian Michael (Virginia Tech, 2015-04-22)
    Smart cameras operate mostly in sleep mode, which is light load for power supplies. Typical buck converter applications have low efficiency under the light load condition, primarily from their power stage and control being optimized for heavy load. The battery life of a smart camera can be extended through improvement of the light load efficiency of the buck converter. This thesis research investigated the first stage converter of a car black box to provide power to a microprocessor, camera, and several other peripherals. The input voltage of the converter is 12 V, and the output voltage is 5 V with the load range being 20 mA (100 mW) to 1000 mA (5000 mW). The primary design objective of the converter is to improve light load efficiency. A 3-level buck converter and its control scheme proposed by Reusch were adopted for the converter in this thesis. A 3-level buck converter has two more MOSFETs and one more capacitor than a synchronous buck converter. Q1 and Q2 are considered the top MOSFETs, while Q3 and Q4 are the synchronous ones. The extra capacitor is used as a second power source to supply the load, which is connected between the source of Q1 and the drain of Q2 and the source of Q3 and the drain of Q4. The methods considered to improve light load efficiency are: PFM (pulse frequency modulation) control scheme with DCM (discontinuous conduction mode) and use of Schottky diodes in lieu of the synchronous MOSFETs, Q3 and Q4. The 3-level buck converter operates in CCM for heavy load above 330 mA and DCM for light load below 330 mA. The first method uses a COT (constant on-time) valley current mode controller that has a built in inductor current zero-crossing detector. COT is used to implement PFM, while the zero-crossing detector allows for DCM. The increase in efficiency comes from reducing the switching frequency as the load decreases by minimizing switching and gate driving loss. The second method uses an external current sense amplifier and a comparator to detect when to shut down the gate drivers for Q3 and Q4. Schottky diodes in parallel with Q3 and Q4 carry the load current when the MOSFETs are off. This increases the efficiency through a reduction in switching loss, gate driving loss, and gate driver power consumption. The proposed converter is prototyped using discrete components. LTC3833 is used as the COT valley current mode controller, which is the center of the control scheme. The efficiency of the 3-level buck converter was measured and ranges from 82% to 95% at 100 mW and 5000 mW, respectively. The transient response of the converter shows no overshoot due to a 500 mA load step up or down, and the output voltage ripple is 30 mV. The majority of the loss comes from the external components, which include a D FF (D flip-flop), AND gate, OR gate, current sense chip, comparator, and four gate drivers. The proposed converter was compared to two off-the-shelf synchronous buck converters. The proposed converter has good efficiency and performance when compared to the other converters, despite the fact that the converter is realized using discrete components.
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    Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density
    Cui, Han (Virginia Tech, 2013-06-28)
    The passive components such as inductors and capacitors are bulky parts on circuit boards. Researchers in academia, government, and industry have been searching for ways to improve the magnetic energy density and reduce the package size of magnetic parts. The "constant-flux" concept discussed herein is leveraged to achieve high magnetic-energy density by distributing the magnetic flux uniformly, leading to inductor geometries with a volume significantly lower than that of conventional products. A relatively constant flux distribution is advantageous not only from the density standpoint, but also from the thermal standpoint via the reduction of hot spots, and from the reliability standpoint via the suppression of flux crowding. For toroidal inductors, adding concentric toroidal cells of magnetic material and distributing the windings properly can successfully make the flux density distribution uniform and thus significantly improve the power density. Compared with a conventional toroidal inductor, the constant-flux inductor introduced herein has an enclosed-winding geometry. The winding layout inside the core is configured to distribute the magnetic flux relatively uniformly throughout the magnetic volume to obtain a higher energy density and smaller package volume than those of a conventional toroidal inductor. Techniques to shape the core and to distribute the winding turns to form a desirable field profile is described for one class of magnetic geometries with the winding enclosed by the core. For a given set of input parameters such as the inductor's footprint and thickness, permeability of the magnetic material, maximum permissible magnetic flux density for the allowed core loss, and current rating, the winding geometry can be designed and optimized to achieve the highest time constant, which is the inductance divided by resistance (L/Rdc). The design procedure is delineated for the constant-flux inductor design together with an example with three winding windows, an inductance of 1.6 µH, and a resistance of 7 mΩ. The constant-flux inductor designed has the same inductance, dc resistance, and footprint area as a commercial counterpart, but half the height. The uniformity factor α is defined to reflect the uniformity level inside the core volume. For each given magnetic material and given volume, an optimal uniformity factor exists, which has the highest time constant. The time constant varies with the footprint area, inductor thickness, relative permeability of the magnetic material, and uniformity factor. Therefore, the objective for the constant-flux inductor design is to seek the highest possible time constant, so that the constant-flux inductor gives a higher inductance or lower resistance than commercial products of the same volume. The calculated time-constant-density of the constant-flux inductor designed is 4008 s/m3, which is more than two times larger than the 1463 s/m3 of a commercial product. To validate the concept of constant-flux inductor, various ways of fabrication for the core and the winding were explored in the lab, including the routing process, lasing process on the core, etching technique on copper, and screen printing with silver paste. The most successful results were obtained from the routing process on both the core and the winding. The core from Micrometals has a relative permeability of around 22, and the winding is made of copper sheets 0.5 mm thick. The fabricated inductor prototype shows a significant improvement in energy density: at the same inductance and resistance, the volume of the constant-flux inductor is two times smaller than that of the commercial counterpart. The constant-flux inductor shows great improvement in energy density and the shrinking of the total size of the inductor below that of the commercial products. Reducing the volume of the magnetic component is beneficial to most power. The study of the constant-flux inductor is currently focused on the dc analysis, and the ac analysis is the next step in the research.
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    Control and Modeling of High-Frequency Voltage Regulator Modules for Microprocessor Application
    Li, Virginia (Virginia Tech, 2021-06-11)
    The future voltage regulator module (VRM) challenges of high bandwidth control with fast transient response, high current output, simple implementation, and efficient 48V solution are tackled in this dissertation. With the push for control bandwidth to meet design specifications for microprocessor VRM with larger and faster load transients, control can be saturated and lost for a significant period of time during transient. During this time, undesirable transient responses such as large undershoot and ringback occurs. Due to the loss of control, the existing tools to study the dynamic behavior of the system, such as small signal model, are insufficient to analyze the behavior of the system during this time. In order to have a better understanding of the system dynamic performance, the operation the VRM is analyzed in the state-plane for a clear visual understanding of the steady-state and transient behaviors. Using the state-plane, a simplified state-plane trajectory control is proposed for constant on-time (COT) control to achieve the best transient possible for applications with adaptive voltage positioning (AVP). When the COT control is lost during a load step-up transient, the state-plane trajectory control will extend on-time to provide the a near optimal transient response. By observing the COT control law in the state-plane, a simplified state-plane trajectory control with analog implementation is proposed to achieve the best transient possible with smooth transitions in and out of the steady-state COT control. The concept of the simplified state-plane trajectory control is then extended to multiphase COT. For multiphase operation, additional operating behavior, such as phase overlapping during transient and interleaving during steady-state, need to be taken into consideration to design the desired state-plane trajectory control. A simple state-plane trajectory control with improved Ton extension is proposed and verified using multiphase COT control. After tackling the state-plane trajectory control for current mode COT, the idea is then extended to V2 COT. V2 COT is a more advanced current mode control which requires a more advanced state-plane trajectory control to COT. By calculating the intersection of the extended on-stage trajectory during transient and the ideal off trajectory in the form of a current limiting wall, a near optimal transient response can be achieved. For V2 COT with state-plane trajectory control, implementations using inductor vs. capacitor current, effect of component tolerance, and effect of IC delay are studied. The proposed state-plane trajectory control is then extended to enhanced V2 COT. Aside from tackling existing VRM challenges, the future datacenter 48V VRM challenge of a high efficiency, high power density solution to meet the VRM specifications is studied. The sigma converter is proposed for the 48V VRM solution due to exhibition of high efficiency and high-power density from hardware evaluation. An accurate model for the sigma converter is derived using the new modeling approach of modularizing the small signal components. Using the proposed model, the sigma converter is shown to naturally have very low output impedance, making the sigma converter suitable for microprocessor applications. The sigma converter is designed and optimized to achieve AVP and very fast transient response using both voltage-mode and current-mode controls.
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    Control, Analysis, and Design of SiC-Based High-Frequency Soft-Switching Three-Phase Inverter/Rectifier
    Son, Gibong (Virginia Tech, 2022-11-01)
    This dissertation presents control, analysis, and design of silicon carbide (SiC)-based critical conduction mode (CRM) high-frequency soft-switching three-phase ac-dc converters (inverter and rectifier). The soft-switching technique with SiC devices grounded in CRM makes the operation of the ac-dc converter at hundreds of kHz possible while maintaining high efficiency with high power density. This is beneficial for rapidly growing fields such as electric vehicle charging, photovoltaic (PV) systems, and uninterruptable power supplies, etc. However, for the soft-switching technique to be practically adopted to real products in the markets, there are a lot of challenges to overcome. In this dissertation, four types of the challenges are carefully studied and discussed to address them. First, the grid-tied inverters used for distributed energy resources, such as PV systems, must continue operating to deliver power to the grid, when it faces flawed grid conditions such as voltage drop and voltage rise. During abnormal grid conditions, delivering constant active power from the inverter to the grid is essential to avoid large voltage ripples on the dc side because it could trigger over-voltage protection or harm the circuitries, eventually shutting down the inverter. Hence, in such cases, unbalanced ac currents need to be injected into the grid. When the grid voltages and the ac currents are not balanced, there is a chance for the CRM soft-switching inverter to lose its soft-switching capability. Continuous conduction mode operation emerges, causing hard-switching where discontinuous conduction mode (DCM) operation is expected. This leads to huge turn-on loss and high dv/dt noise at the active switch's turn-on moment. To eradicate the hard-switching problem, two improved modulation schemes are developed; one with off-time extension in the CRM phase, the other by skipping switching pulses in the DCM phase. The DCM pulse skipping is applied for a variety of grid imbalance cases, and it is proven that it can be a generalized solution for any kinds of unbalanced grid conditions. Second, the CRM soft-switching scheme with 2-channel interleaving achieves high efficiency at heavy load. Nevertheless, the efficiency plunges as the output load is reduced. This is not suitable for PV inverters, which take account of light load efficiency in terms of "weighted efficiency". Small inductor currents at light load cause the switching frequency to soar because of its CRM-based operation characteristic, causing large switching loss. To increase the inductor current dealt with by the first channel, a phase shedding control is proposed. Gate signals for the second channel are not excited, increasing the first channel's inductor current, thus cutting down the first channel's switching frequency. To prevent the unwanted circulating current formed by shared zero-sequence voltage in the paralleled structure, only two phases in the second channel working in high frequency are shed. The proposed phase shedding control achieves a 0.5 to 3.9 % efficiency improvement with light loads. Third, due to the usage of SiC devices, high dv/dt generated at switching nodes over the system parasitic capacitance causes substantial common mode (CM) noise compared to that with Si devices. In this case, a balance technique with PCB winding inductors can effectively reduce the CM noise. First, winding interleaving structure is selected to minimize the eddy current loss in the windings. But the interwinding capacitance caused by the winding interleaving structure aggravates the CM noise. Impact of the interwinding capacitance on the CM noise is analyzed with a new inductor model containing the interwinding capacitance. Then, finally, a novel inductor structure is proposed to remove the interwinding capacitance and to improve the CM noise reduction performance. The soft-switching ac-dc converter built with the final PCB magnetics features almost similar efficiency compared to that with litz-wire inductor and 14 to 18 dB CM noise reduction up to 15 MHz. Lastly, the soft-switching technique is extended to inverters in standalone mode. To meet tight ac voltage total harmonic distortion requirements, a current control in dq-frame is introduced. As for the ac voltage regulation at no-load, on top of the improved phase shedding control, a frequency limiting with fixed frequency DCM method is applied to prevent excessive increase in the switching frequency. Then, how to deal with short-circuit at the output load is investigated. Since the soft-switching modulation violates inductor voltage-second balance during the short-circuit, the modulation method is switched to a conventional sinusoidal PWM at fixed frequency. It is concluded that all the additional requirements for the standalone inverters can be satisfied by the introduced control strategies.
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    Critical-mode-based soft-switching techniques for three-phase bi-directional AC/DC converters
    (United States Patent and Trademark Office, 2019-05-14)
    Critical-mode soft-switching techniques for a power converter are described. In one example, a power converter includes a converter electrically coupled between an alternating current (AC) power system and a direct current (DC) power system, where the converter includes a number of phase legs. The power converter can also include a control system configured, during a portion of a whole line cycle of the AC power system, to clamp a first phase leg of the converter from switching and operate second and third phase legs of the converter independently in either critical conduction mode (CRM) or in discontinuous conduction mode (DCM).
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    Current mode control DC-DC converter with single step load transient response
    (United States Patent and Trademark Office, 2019-06-04)
    A power converter using constant on-time (COT) or ramp pulse modulation (RPM) control achieves more rapid resumption of steady-state operation after a step-up load transient by extending an on-time of a switching pulse by interrupting a ramp voltage waveform that is compared with a threshold that equals a threshold voltage at the termination of a switching pulse or increasing a voltage with which the ramp voltage is compared. These techniques are applied to both single-phase and multi-phase power converters.
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    Design and Implementation of a Multiphase Buck Converter for Front End 48V-12V Intermediate Bus Converters
    Salvo, Christopher (Virginia Tech, 2019-07-25)
    The trend in isolated DC/DC bus converters is to increase the output power in the same brick form factors that have been used in the past. Traditional intermediate bus converters (IBCs) use silicon power metal oxide semiconductor field effect transistors (MOSFETs), which recently have reached the limit in terms of turn on resistance (RDSON) and switching frequency. In order to make the IBCs smaller, the switching frequency needs to be pushed higher, which will in turn shrink the magnetics, lowering the converter size, but increase the switching related losses, lowering the overall efficiency of the converter. Wide-bandgap semiconductor devices are becoming more popular in commercial products and gallium nitride (GaN) devices are able to push the switching frequency higher without sacrificing efficiency. GaN devices can shrink the size of the converter and provide better efficiency than its silicon counterpart provides. A survey of current IBCs was conducted in order to find a design point for efficiency and power density. A two-stage converter topology was explored, with a multiphase buck converter as the front end, followed by an LLC resonant converter. The multiphase buck converter provides regulation, while the LLC provides isolation. With the buck converter providing regulation, the switching frequency of the entire converter will be constant. A constant switching frequency allows for better electromagnetic interference (EMI) mitigation. This work includes the details to design and implement a hard-switched multiphase buck converter with planar magnetics using GaN devices. The efficiency includes both the buck efficiency and the overall efficiency of the two-stage converter including the LLC. The buck converter operates with 40V - 60V input, nominally 48V, and outputs 36V at 1 kW, which is the input to the LLC regulating 36V – 12V. Both open and closed loop was measured for the buck and the full converter. EMI performance was not measured or addressed in this work.
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    Design and Integration Techniques for High-Frequency PCB-Based Magnetics in Resonant Converters
    Ahmed, Ahmed Salah Nabih (Virginia Tech, 2023-07-11)
    In today's industrial power converters, converter reliability is essential, and converter topologies are well-established. Without a doubt, the power electronic industry continues to seek efficient power delivery and high power density. Resonant converters, especially LLC converters, have been intensively studied and applied in DC-DC converters. One of the most demanding applications for LLC converters is data centers. To date, LLC Resonant converters, are deployed in many applications for improved efficiency, density, and reliability. With the introduction of WBG devices coupled with the soft switching feature, the switching frequency can be extended beyond Mega-Hertz. With the significant increase in operating frequency, complicated magnetic components can be broken down into a cellular structure, each with a few number of turns. They can be easily implemented using 4-6 layers of PCB windings. Moreover, integrating the cellular cores using flux cancellation can further improve the power density. The proposed integrated magnetics can be automated in the manufacturing process. The magnetic size is reduced at this frequency, and planar magnetics using PCB winding become more relevant. PCB magnetics feature multiple advantages over Litz wire. The benefits are summarized as follows: The labor-intensive manufacturing process can be automated, thus reduction of cost. There is much reduced CM noise by using the shield layer. They have parasitics with much-improved reproducibility in large quantities. PCB windings feature less leakage between transformer windings because of the flexibility of the winding interleaving and the reduced number of turns. There is better thermal management due to the increased surface-to-body ratio. The design has a low profile and high-power density. However, it is not without its own limitations. There are challenges for high frequency PCB-magnetic magnetic design for the LLC converter. Firstly, With the recently developed high frequency core material, a phenomenon referred to as the dimensional resonant is observed. The effects of dimensional resonance were discussed in the literature when using an unusually large core structure; however, it can be observed more frequently under high excitation frequency, particularly with integrated magnetics. This dissertation discusses the dimensional effects of core loss on a PCB-based magnetics structure. A case study is presented on a 3-kW 400-to-48-V LLC prototype running at 1 MHz. The converter utilizes a low-profile matrix of two integrated transformers with a rectangular and thin cross-section area for reduced core loss. Specific solutions are presented. % Secondly, The matrix transformer is suitable for an LLC converter with high output current. However, the matrix transformer also increases the core size and core losses. The core loss degrades the LLC converter's light load and peak efficiency. In this dissertation, We discuss the design process and implementation of the DC-DC stage of the power supply unit for narrow range 48 V data center bus architecture. The optimization takes into account the number of elemental transformers, number of transformer turns, switching frequency, and transformer dimensions, namely winding width and core cross-section area. The optimization process results in a nearly 99% efficient 400-to-48-V LLC with a very high-power density and low profile fully integrated on PCB. A matrix of four transformers is used to reduce the termination loss of the secondary synchronous rectifier and achieve better thermal management. The number of secondary turns is optimized to achieve the best trade-off between winding loss, core loss, and power density. Another challenge arises for magnetic integration when multiple magnetic components with different characteristics come together. For instance, in the case of a transformer and an inductor on the same PCB. The PCB transformer is designed with perfectly interleaved primary and secondary layers to utilize the full PCB layer thickness. As a rule of thumb, the transformer winding layer is designed within 1 to 2 times the skin depth. On the other hand, the inductor's winding lacks interleaving and suffers from high MMF stress on layers. This makes the inductor prone to high eddy currents and eddy loss. Furthermore, this dissertation addresses the challenges associated with the high winding and core loss in the Integrated Transformer-Inductor (ITL). To overcome these challenges, we propose an improved winding design of the ITL by utilizing idle shielding layers for inductor integration within the matrix transformer. This method offers full printed circuit board (PCB) utilization, where all layers are consumed as winding, resulting in a significant reduction in the winding loss of the ITL. Moreover, we propose an improved core structure of the ITL that offers better flux distribution of the leakage flux within the magnetic core. This method reduces the core loss by more than 50% compared to the conventional core structure. We demonstrate the effectiveness of our proposed concepts by presenting the design of the ITL used in a high-efficiency, high-power-density 3-kW 400-to-48-V LLC module. The proposed converter achieves a peak efficiency of 98.7% and a power density of 1500 W/in3. This dissertation presents the concept of matrix inductors to solve such problems. A matrix of four resonant inductors is also designed to reduce the proximity effect between inductor windings and reduce inductor PCB winding loss. The matrix inductor provides a solution for high thermal stress in PCB-based inductors and reduces the inter-winding capacitance between inductor layers. This dissertation solves the challenges in magnetic design in high-frequency DC-DC converters in offline power supplies and data centers. This includes the transformer and inductor of the LLC converter. With the academic contribution in this dissertation, Wide-bandgap devices WBG can be successfully utilized in high-frequency DC-DC converters with Mega-Hertz switching frequency to achieve high efficiency, high power density, and automated manufacturing. The cost will be reduced, and the performance will be improved significantly.
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    Design of a Resonant Snubber Inverter for Photovoltaic Inverter Systems
    Faraci, William Eric (Virginia Tech, 2014-05-06)
    With the rise in demand for renewable energy sources, photovoltaics have become increasingly popular as a means of reducing household dependence on the utility grid for power. But solar panels generate dc electricity, a dc to ac inverter is required to allow the energy to be used by the existing ac electrical distribution. Traditional full bridge inverters are able to accomplish this, but they suffer from many problems such as low efficiency, large size, high cost, and generation of electrical noise, especially common mode noise. Efforts to solve these issues have resulted in improved solutions, but they do not eliminate all of the problems and even exaggerate some of them. Soft switching inverters are able to achieve high efficiency by eliminating the switching losses of the power stage switches. Since this action requires additional components that are large and have additional losses associated with them, these topologies have traditionally been limited to higher power levels. The resonant snubber inverter is a soft switching topology that eliminates many of these problems by taking advantage of the bipolar switching action of the power stage switches. This allows for a significant size reduction in the additional parts and elimination of common mode noise, making it an ideal candidate for lower power levels. Previous attempts to implement the resonant snubber inverter have been hampered by low efficiency due to parasitics of the silicon devices used, but, with recent developments in new semiconductor technologies such as silicon carbide and gallium nitride, these problems can be minimized and possibly eliminated. The goal of this thesis is to design and experimentally verify a design of a resonant snubber inverter that takes advantage of new semiconductor materials to improve efficiency while maintaining minimal additional, parts, simple control, and elimination of common mode noise. A 600 W prototype is built. The performance improvements over previous designs are verified and compared to alternative high efficiency solutions along with a novel control technique for the auxiliary resonant snubber. A standalone and grid tie controller are developed to verify that the auxiliary resonant snubber and new auxiliary control technique does not complicate the closed loop control.