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dc.contributor.authorShah, Sandeep R.en_US
dc.date.accessioned2014-03-14T21:30:27Z
dc.date.available2014-03-14T21:30:27Z
dc.date.issued1991en_US
dc.identifier.otheretd-03022010-020143en_US
dc.identifier.urihttp://hdl.handle.net/10919/41322
dc.format.mediumBTDen_US
dc.publisherVirginia Techen_US
dc.relation.haspartLD5655.V855_1991.S523.pdfen_US
dc.subjectVHDL (Computer hardware description language)en_US
dc.subject.lccLD5655.V855 1991.S523en_US
dc.titleA framework for synthesis from VHDLen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical Engineeringen_US
dc.description.degreeMaster of Scienceen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
thesis.degree.disciplineElectrical Engineeringen_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-03022010-020143/en_US
dc.date.sdate2010-03-02en_US
dc.date.rdate2010-03-02
dc.date.adate2010-03-02en_US


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