Parallel processor architecture for a digital beacon receiver
Files
TR Number
Date
1990
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
Virginia Tech
Abstract
A digital beacon receiver has been developed to monitor the OLYMPUS satellite beacons. The receiver accepts a nominal 10 MHz IF input and processes the signal using digital signal processing techniques. Fast Fourier transforms are used to locate the carrier within 0.5 Hz. The outputs of the receiver include the frequency and the power of the carrier.