Efficient Binary Field Multiplication on a VLIW DSP

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dc.contributor.authorTergino, Christian Seanen
dc.contributor.committeechairSchaumont, Patrick R.en
dc.contributor.committeememberHsiao, Michael S.en
dc.contributor.committeememberFeng, Wu-chunen
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:40:22Zen
dc.date.adate2009-07-08en
dc.date.available2014-03-14T20:40:22Zen
dc.date.issued2009-06-18en
dc.date.rdate2009-07-08en
dc.date.sdate2009-06-22en
dc.description.abstractModern public-key cryptography relies extensively on modular multiplication with long operands. We investigate the opportunities to optimize this operation in a heterogeneous multiprocessing platform such as TI OMAP3530. By migrating the long operand modular multiplication from a general-purpose ARM Cortex A8 to a specialized C64x+ VLIW DSP, we are able to exploit the XOR-Multiply instruction and the inherent parallelism of the DSP. The proposed multiplication utilizes Multi-Precision Binary Polynomial Multiplication with Unbalanced Exponent Modular Reduction. The resulting DSP implementation performs a GF(2^233) multiplication in less than 1.31us, which is over a seven times speed up when compared with the ARM implementation on the same chip. We present several strategies for different field sizes and field polynomials, and show that a 360MHz DSP easily outperforms the 500MHz ARM.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-06222009-150103en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-06222009-150103/en
dc.identifier.urihttp://hdl.handle.net/10919/33693en
dc.publisherVirginia Techen
dc.relation.haspartThesis.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectVery Long Instruction Worden
dc.subjectModular Multiplicationen
dc.subjectC64x+en
dc.subjectDigital Signal Processoren
dc.subjectMultiplicationen
dc.subjectBinary Fielden
dc.subjectGalois Fielden
dc.subjectGFen
dc.subjectHeterogeneous Multiprocessorsen
dc.titleEfficient Binary Field Multiplication on a VLIW DSPen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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