A Low-Power Design of Motion Estimation Blocks for Low Bit-Rate Wireless Video Communications
dc.contributor.author | Richmond II, Richard Steven | en |
dc.contributor.committeechair | Ha, Dong Sam | en |
dc.contributor.committeemember | Reed, Jeffrey H. | en |
dc.contributor.committeemember | Armstrong, James R. | en |
dc.contributor.department | Electrical and Computer Engineering | en |
dc.date.accessioned | 2014-03-14T20:32:36Z | en |
dc.date.adate | 2001-03-14 | en |
dc.date.available | 2014-03-14T20:32:36Z | en |
dc.date.issued | 2001-03-13 | en |
dc.date.rdate | 2002-03-14 | en |
dc.date.sdate | 2001-03-13 | en |
dc.description.abstract | Motion estimation and motion compensation comprise one of the most important compression methods for video communications. We propose a low-power design of a motion estimation block for a low bit-rate video codec standard H.263. Since the motion estimation is computationally intensive to result in large power consumption, a low-power design is essential for portable or mobile systems. Our block employs the Four-Step Search (4SS) method as its primary algorithm. The design and the algorithm have been optimized to provide adequate results for low-quality video at low-power consumption. The model is developed in VHDL and synthesized using a 0.35 um CMOS library. Power consumption of both gate-level circuits and memory-accesses have been considered. Gate-level simulation shows the proposed design offers a 38% power reduction over a "baseline" implementation of a 4SS model and a 60% power reduction over a baseline Three-Step Search (TSS) model. Power savings through reduction of memory access is 26% over the TSS model and 32% over the 4SS model. The total power consumption of the proposed motion estimation block ranges from 7 - 9 mW and is dependent on the type of video being motion estimated. | en |
dc.description.degree | Master of Science | en |
dc.identifier.other | etd-03132001-140635 | en |
dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-03132001-140635/ | en |
dc.identifier.uri | http://hdl.handle.net/10919/31458 | en |
dc.publisher | Virginia Tech | en |
dc.relation.haspart | Final.pdf | en |
dc.rights | In Copyright | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
dc.subject | Four-step search | en |
dc.subject | Low power | en |
dc.subject | Motion estimation | en |
dc.subject | H.263 | en |
dc.title | A Low-Power Design of Motion Estimation Blocks for Low Bit-Rate Wireless Video Communications | en |
dc.type | Thesis | en |
thesis.degree.discipline | Electrical and Computer Engineering | en |
thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
thesis.degree.level | masters | en |
thesis.degree.name | Master of Science | en |
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