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Characterizing Retention behavior of DDR4 SoDIMM

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Palani_P_T_2024.pdf (9.95 MB)
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Date

2024-06-05

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Journal Title

Journal ISSN

Volume Title

Publisher

Virginia Tech

Abstract

Description

Keywords

DDR4, DRAM, PUF, FPGA, Xilinx, Magnetic Field, decay, retention analysis, bit flips

Citation

Persistent link

https://hdl.handle.net/10919/119322

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Masters Theses