A microprocessor based bus relay

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Virginia Tech


A microprocessor based bus protection scheme has been proposed for a single bus system which employs a new technique to overcome the problem of current transformer saturation. The protection scheme uses a combination of the

percentage differential current principle and the phase comparison principle. A sampling rate of 1440 Hz is used. Existing algorithms for a saturation detector are reviewed and a new saturation detector has been developed. This new saturation detector employs the slope difference of the secondary current to determine the CT state. It has a high sensitivity and can reveal early (one-eighth cycle) saturation. With the incorporation of this new saturation detector, the bus relay can make a correct decision for either an internal or an external fault in the presence of current transformer saturation in a half cycle in most cases.

The bus protection scheme has been coded in Fortran and tested against data produced from EMTP. The simulated results from eight sets of data are presented in this thesis. All cases show that the bus protection scheme works correctly.

The algorithm for the new saturation detector will be implemented using a 32-bit microprocessor by Mr. Paul A. Dolloff.