5-6 GHz RFIC Front-End Components in Silicon Germanium HBT Technology
| dc.contributor.author | Johnson, Daniel Austin | en |
| dc.contributor.committeechair | Raman, Sanjay | en |
| dc.contributor.committeemember | Pratt, Timothy J. | en |
| dc.contributor.committeemember | Bostian, Charles W. | en |
| dc.contributor.department | Electrical and Computer Engineering | en |
| dc.date.accessioned | 2014-03-14T20:35:36Z | en |
| dc.date.adate | 2001-05-10 | en |
| dc.date.available | 2014-03-14T20:35:36Z | en |
| dc.date.issued | 2001-04-12 | en |
| dc.date.rdate | 2002-05-10 | en |
| dc.date.sdate | 2001-05-08 | en |
| dc.description.abstract | In 1997 the Federal Communications Commission (FCC) released 300 MHz of spectrum between 5-6 GHz designated the unlicensed national information infrastructure (U-NII) band. The intention of the FCC was to provide an unlicensed band of frequencies that would enable high-speed wireless local area networks (WLANs) and facilitate wireless access to the national information infrastructure with a minimum interference to other devices. Currently, there is a lack of cost-effective technologies for developing U-NII band components. With the commercial market placing emphasis on low cost, low power, and highly integrated implementations of RF circuitry, alternatives to the large and expensive distributed element components historically used at these frequencies are needed. Silicon Germanium (SiGe) BiCMOS technology represents one possible solution to this problem. The SiGe BiCMOS process has the potential for low cost since it leverages mature Si process technologies and can use existing Si fabrication infrastructure. In addition, SiGe BiCMOS processes offer excellent high frequency performance through the use of SiGe heterojunction bipolar transistors (HBTs), while coexisting Si CMOS offers compatibility with digital circuitry for high level 'system-on-a-chip' integration. The work presented in this thesis focuses on the development of a SiGe RFIC front-end for operation in the U-NII bands. Specifically, three variants of a packaged low noise amplifier (LNA) and a packaged active x2 sub-harmonic mixer (SHM) have been designed, simulated and measured. The fabrication of the Rifts was through the IBM SiGe foundry; the packaging was performed by RF Micro devices. The mixer and LNA designs were fabricated on separate die, packaged individually, and on-chip matched to a 50 ohm system so they could be fully characterized. Measurements were facilitated in a coaxial system using standard FR4 printed circuit boards. The LNA designs use a single stage, cascoded topology. The input ports are impedance matched using inductive emitter degeneration through bondwires to ground. One version of the LNA uses an shunt inductor/series capacitor output match while the other two variation use a series inductor output match. Gain, isolation, match, linearity and noise figure (NF) were used to characterize the performance of the LNAs in the 5 - 6 GHz frequency band. The best LNA design has a maximum gain of 9 dB, an input VSWR between 1.6:1 and 2:1, an output match between 1.7:1 and 3.6:1, a NF better than 3.9 dB and an input intercept point (IIP3) greater than 5.4 dBm. The LNA operates from a 3.3 V supply voltage and consumes 4 mA of current. The SHM is an active, double-balance mixer that achieves x2 sub-harmonic mixing through two quadrature (I/Q) driven, stacked Gilbert-cell switching stages. Single-ended-to-differential conversion, buffering and I/Q phase separation of the LO signal are integrated on-chip. Measurements were performed to find the optimal operating range for the mixer, and the mixer was characterized under these sets of conditions. It was found that the optimal performance of the mixer occurs at an IF of 250-450 MHz and an LO power of -5 dBm. Under these conditions, the mixer has a measured conversion gain of 9.3 dB, a P_1-dB of -15.7 dBm and an 2LO/RF isolation greater than 35 dB at 5.25 GHz. At 5.775 GHz, the conversion gain is 7.7 dB, the P<sub>1-dB</sub> is -15.0 dBm, and the isolation is greater than 35 dB. The mixer core consumes 9.5 mA from a 5.0 V supply voltage. This work is sponsored by RF Microdevices (RFMD)through the CWT affiliate program.The author was supported under a Bradley Foundation fellowship. | en |
| dc.description.degree | Master of Science | en |
| dc.identifier.other | etd-05082001-131602 | en |
| dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-05082001-131602/ | en |
| dc.identifier.uri | http://hdl.handle.net/10919/32356 | en |
| dc.publisher | Virginia Tech | en |
| dc.relation.haspart | thesisFinal.pdf | en |
| dc.rights | In Copyright | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject | Front-end | en |
| dc.subject | Mixer | en |
| dc.subject | 5 GHz | en |
| dc.subject | Integrated circuit | en |
| dc.subject | LNA | en |
| dc.subject | ISM | en |
| dc.subject | SiGe | en |
| dc.subject | RFIC | en |
| dc.subject | U-NII | en |
| dc.subject | Sub-harmonic | en |
| dc.title | 5-6 GHz RFIC Front-End Components in Silicon Germanium HBT Technology | en |
| dc.type | Thesis | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
| thesis.degree.level | masters | en |
| thesis.degree.name | Master of Science | en |
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