Browsing by Author "Burgos, Rolando"
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- 3D Commutation-Loop Design Methodology for a SiC Based Matrix Converter run in Step-up mode with PCB Aluminum Nitride Cooling InlayBaker, Victoria Isabelle (Virginia Tech, 2021-07-22)This work investigates three-dimensional power loop layout for application to a SiC based matrix converter, providing a symmetric, low-inductance solution. The thesis presents various layout types to achieve this design target, and details the implementation of a hybrid layout to the matrix converter phase-leg. This layout is more easily achievable with a surface-mount device package, which also offers benefits such as ease in manufacturing, and a compact package. In order to implement a surface-mount device, a PCB thermal management strategy should be utilized. An evaluation of these methods is also presented in the work. The final power loop solution that implements an aluminum nitride inlay is evaluated through simulated parasitic extraction and experimental double pulse tests. The layout achieves small, symmetric loop inductances. Finally, the full power, three-phase matrix converter demonstrates the successful implementation of this power loop layout.
- Algorithm and implementation system for measuring impedance in the D-Q domain(United States Patent and Trademark Office, 2015-09-22)A controller and infrastructure for an impedance analyzer measures responses to perturbations to respective phases of a multi-phase system at an interface between stages thereof (which may be considered as a source and load in regard to each other), such as a multi-phase electrical power system, to determine a transfer function for each phase of the multi-phase system from which the impedance of each of the source and load can be calculated, particularly for assessing the stability of the multi-phase system.
- An Algorithm and System for Measuring Impedance in D-Q CoordinatesFrancis, Gerald (Virginia Tech, 2010-01-25)This dissertation presents work conducted at the Center for Power Electronics Systems (CPES) at Virginia Polytechnic Institute and State University. Chapter 1 introduces the concept of impedance measurement, and discusses previous work on this topic. This chapter also addresses issues associated with impedance measurement. Chapter 2 introduces the analyzer architecture and the proposed algorithm. The algorithm involves locking on to the voltage vector at the point of common coupling between the analyzer and the system via a PLL to establish a D-Q frame. A series of sweeps are performed, injecting at least two independent angles in the D-Q plane, acquiring D- and Q-axis voltages and currents for each axis of injection at the point of interest. Chapter 3 discusses the analyzer hardware and the criteria for selection. The hardware built ranges from large-scale power level hardware to communication hardware implementing a universal serial bus. An eight-layer PCB was constructed implementing analog signal conditioning and conversion to and from digital signals with high resolution. The PCB interfaces with the existing Universal Controller hardware. Chapter 4 discusses the analyzer software. Software was written in C++, VHDL, and Matlab to implement the measurement process. This chapter also provides a description of the software architecture and individual components. Chapter 5 discusses the application of the analyzer to various examples. A dynamic model of the analyzer is constructed, considering all components of the measurement system. Congruence with predicted results is demonstrated for three-phase balanced linear impedance networks, which can be directly derived based on stationary impedance measurements. Other impedances measured include a voltage source inverter, Vienna rectifier, six-pulse rectifier and an autotransformer-rectifier unit.
- Analysis and Design for a High Power Density Three-Phase AC Converter Using SiC DevicesLai, Rixin (Virginia Tech, 2008-12-10)The development of high power density three-phase ac converter has been a hot topic in power electronics area due to the increasing needs in applications like electric vehicle, aircraft and aerospace, where light weight and/or low volume is usually a must. Many challenges exist due to the complicated correlations in a three-phase power converter system. In addition, with the emerging SiC device technology the operating frequency of the converter can be potentially pushed to the range from tens of kHz to hundreds of kHz at higher voltage and higher power conditions. The extended frequency range brings opportunities to further improve the power density of the converter. Technologies based on existing devices need to be revisited. In this dissertation, a systematic methodology to analyze and design the high power density three-phase ac converter is developed. All the key factors of the converter design are explored from the high density standpoint. Firstly, the criteria for the passive filter selection are derived and the relationship between the switching frequency and the size of the EMI filter is investigated. A function integration concept as well as the physical design approach is proposed. Secondly, a topology evaluation method is presented, which provides the insight into the relationships between the system constraints, operating conditions and design variables. Four topologies are then compared with the proposed approach culminating with a favored topology under the given conditions. Thirdly, a novel average model is developed for the selected topology, and used for devising a carrier-based control approach with simple calculation and good regulation performance. Fourthly, the converter failure mode operation and corresponding protection approaches are discussed and developed. Finally, a 10 kW three-phase ac/ac converter is built with the SiC devices. All the key concepts and ideas developed in this work are implemented in this hardware system and then verified by the experimental results.
- Back to Back Active Power Filter for Multi-Generator Power Architecture with Reduced dc-link CapacitorKim, Jong Wan (Virginia Tech, 2020-01-30)Multi-pulse converters have been widely used for a multi-megawatt scale power generating system to comply with harmonic regulations. Among all types of multi-pulse converters, a 12-pulse converter is the most widely used due to the simple structure, which consists of a delta-delta and a delta-wye phase-shift transformer pair and it effectively mitigates undesirable harmonics from the nonlinear load. In the early 2000s, a shunt type passive front-end for a shipboard power system was proposed. By shunting the two gensets with 30° phase angle difference, a single phase-shift transformer effectively eliminates 5th and 7th harmonics. It achieves a significant size and weight reduction compared to a 12-pulse converter while keep the comparable harmonic cancellation performance. Recently, a hybrid type front-end was proposed. On top of the passive front-end, 3 phase active power filter was added and an additional harmonic cancellation was achieved to further eliminate 11th and 13th harmonics. However, the performance of both the passive and hybrid type front-end are highly dependent on the size of the line reactor in ac mains. A back to back active power filter is proposed in this dissertation to replace the phase-shift transformer in the multi-generator power architecture. The proposed front-end does not include phase-shift transformer and the size and the weight of the overall front-end can be significantly reduced. Due to the active harmonic compensation, the back to back front-end achieves better power quality and the line reactor dependency is improved. The number of required dc-link capacitors is reduced by half by introducing a back to back configuration and the capacitor size is reduced by adjusting the phase angle difference of genset to cancel out the most significant voltage harmonics in the shared dc-link bus. The overview of the existing shunt type front-end is provided and the concept of back to back active power filter is validated by simulation and prototype hardware. The comparison between existing front-end and the proposed front-end is provided to highlight the superior performance of back to back active front-end. The dc-link bus current and voltage ripple analysis is provided to explain the dc-link ripple reduction mechanism.
- Characterization and Failure Mode Analysis of Cascode GaN HEMTLiu, Zhengyang (Virginia Tech, 2014-07-16)Recent emerging gallium nitride (GaN) high electron mobility transistor (HEMT) is expected to be a promising candidate for high frequency power conversion techniques. Due to the advantages of the material, the GaN HEMT has a better figure of merit (FOM) compared to the state-of-the-art silicon (Si) power metal oxide silicon field effect transistor (MOSFET), which allows the GaN HEMT to switch with faster transition and lower switching loss. By applying the GaN HEMT in a circuit design, it is possible to achieve high frequency, high efficiency, and high density power conversion at the same time. To characterize the switching performance of the GaN HEMT, an accurate behavior-level simulation model is developed in this thesis. The packaging related parasitic inductance, including both self-inductance and mutual-inductance, are extracted based on finite element analysis (FEA) methods. Then the accuracy of the simulation model is verified by a double-pulse tester, and the simulation results match well with experiment in terms of both device switching waveform and switching energy. Based on the simulation model, detailed loss breakdown and loss mechanism analysis are made. The cascode GaN HEMT has high turn-on loss due to the body diode reverse recovery of the low voltage Si MOSFET and the common source inductance (CSI) of the package; while the turn-off loss is extremely small attributing to the cascode structure. With this unique feature, the critical conduction mode (CRM) soft switching technique are applied to reduce the dominant turn on loss and increase converter efficiency significantly. The switching frequency is successfully pushed to 5MHz while maintaining high efficiency and good thermal performance. Traditional packaging method is becoming a bottle neck to fully utilize the advantages of GaN HEMT. So an investigation of the package influence on the cascode GaN HEMT is also conducted. Several critical parasitic inductors are identified, which cause high turn on loss and high parasitic ringing which may lead to device failure. To solve the issue, the stack-die package is proposed to eliminate all critical parasitic inductors, and as a result, reducing turn on loss by half and avoiding potential failure mode of the cascode GaN device effectively. Utilizing the proposed stack-die package and ZVS soft switching, the GaN HEMT high frequency, high efficiency, and high density power conversion capability can be further extended to a higher level.
- Characterization, Reliability and Packaging for 300 °C MOSFETNam, David (Virginia Tech, 2020-03-06)Silicon carbide (SiC) is a wide bandgap material capable of higher voltage and higher temperature operation compared to its silicon (Si) counterparts due to its higher critical electric field (E-field) and higher thermal conductivity. Using SiC, MOSFETs with a theoretical high temperature operation and reliability is achievable. However, current bottlenecks in high temperature SiC MOSFETs lie within the limitations of standard packaging. Additionally, there are reliability issues relating to the gate oxide region of the MOSFET, which is exacerbated through high temperature conditions. In this thesis, high temperature effects on current-generation SiC MOSFETs are studied and analyzed. To achieve this, a high temperature package is created to achieve reliable operation of a SiC MOSFET at junction temperatures of 300 °C. The custom, high temperature package feasibility is verified through studying trends in SiC MOSFET behavior with increasing temperature up to 300 °C by static characterization. Additionally, the reliability of SiC MOSFETs at 300 °C is tested with accelerated lifetime bias tests.
- Circuits and Modulation Schemes to Achieve High Power-Density in SiC Grid-connected ConvertersOhn, Sungjae (Virginia Tech, 2019-05-16)The emergence of silicon-carbide (SiC) devices has been a 'game changer' in the field of power electronics. With desirable material properties such as low-loss characteristics, high blocking voltage, and high junction temperature operation, they are expected to drastically increase the power density of power electronics systems. Recent state-of-the-art designs show the power density over 17 ; however, certain factors limit the power density to increase beyond this limit. In this dissertation, three key factors are selected to increase the power density of SiC-based grid-connected three-phase converters. Throughout this dissertation, the techniques and strategies to increase the power density of SiC three-phase converters were investigated. Firstly, a magnetic integration method was introduced for the coupled inductors in the interleaved three-phase converters. Due to limited current-capacity compared to the silicon insulated-gate bipolar transistors (Si-IGBTs), discrete SiC devices or SiC modules, operate in parallel to handle a large current. When three-phase inverters are paralleled, interleaving can be used, and coupled inductors are employed to limit the circulating current. In Chapter 2, the conventional integration method was extended to integrate three coupled inductors into two; one for differential-mode circulating current and the other for common-mode circulating current. By comparing with prior research work, a 20% reduction in size and weight is demonstrated. From Chapter 3 to Chapter 5, a full-SiC uninterruptible power supply (UPS) was investigated. With the high switching frequency and fast switching dynamics of SiC devices, strategies on electromagnetic inference become more important, compared to Si-IGBT based inverters. Chapter 3 focuses on a common-mode equivalent circuit model for a topology and pulse width modulation (PWM) scheme selection, to set a noise mitigation strategy in the design phase. A three terminal common-mode electromagnetic interference (EMI) model is proposed, which predicts the impact of the dc-dc stage and a large battery-rack on the output CM noise. Based on the model, severe deterioration of noise by the dc-dc stage and battery-rack can be predicted. Special attention was paid on the selection of the dc-dc stage's topology and the PWM scheme to minimize the impact. With the mitigation strategy, a maximum 16 dB reduction on CM EMI can be achieved for a wide frequency range. In Chapter 4, an active PWM scheme for a full-SiC three-level back-to-back converter was proposed. The PWM scheme targets the size reduction of two key components: dc-link capacitors and a common-mode EMI filter. The increase in switching frequency calls for a large common-mode EMI filter, and dc-link capacitors in the three-level topology may take a considerable portion in the total volume. To reduce the common-mode noise emission, different combinations of the voltage vectors are investigated to generate center-aligned single pulse common-mode voltage. By such an alignment of common-mode voltage with different vector combinations, noise cancellation between the rectifier and the inverter can be maximally utilized, while the balancing of neutral point voltage can be achieved by the transition between the combinations. Also, to reduce the size of the dc-link capacitor for the three-level back-to-back converter, a compensation algorithm for neutral point voltage unbalance was developed for both differential-mode voltage and the common-mode voltage of the ac-ac stage. The experimental results show a 4 dB reduction on CM EMI, which leads to a 30% reduction on the required CM inductance value. When a 10% variation of neutral point voltage can be handled, the dc-link capacitance can be reduced by 56%. In Chapter 5, a 20 kW full-SiC UPS prototype was built to demonstrate a possible size-reduction with the proposed PWM scheme, as well as a selection of topologies and PWM schemes based on the model. The power density and efficiency are compared with the state-of-the-art Si-IGBT based UPSs. Chapter 6 seeks to improve power density by a change in a modulation method. Triangular conduction mode (TCM) operation of the three-level full-SiC inverter was investigated. The switching loss of SiC devices is reported to be concentrated on the turn-on instant. With zero-voltage turn-on of all switches, the switching frequency of a three-level three-phase SiC inverter can be drastically increased, compared to the hard-switching operation. This contributes to the size-reduction of the filter inductors and EMI filters. Based on the design to achieve a 99% peak efficiency, a comparison was made with a full-SiC three-level inverter, operating in continuous conduction mode (CCM), to verify the benefit of the soft switching scheme on the power density. A design procedure for an LCL filter of paralleled TCM inverters was developed. With 3.5 times high switching frequency, the total weight of the filter stage of the TCM inverter can be reduced by 15%, compared to that of the CCM inverter. Throughout this dissertation, techniques for size reduction of key components are introduced, including coupled inductors in parallel inverters, an EMI filter, dc-link capacitors, and the main boost inductor. From Chapter 2 to 5, the physical size or required value of these key components could be reduced by 20% to 56% by different schemes such as magnetic integration, EMI mitigation strategy through modeling, and an active PWM scheme. An optimization result for a full-SiC UPS showed a 40% decrease in the total volume, compared to the state-of-the-art Si-IGBT solution. Soft-switching modulation for SiC-based three-phase inverters can bring a significant increase in the switching frequency and has the potential to enhance power-density notably. A three-level three-phase full-SiC 40 kW PV inverter with TCM operation contributed to a 15% reduction on the filter weight.
- Circulating current injection control(United States Patent and Trademark Office, 2018-12-11)In one example, a power converter includes a modular multilevel converter (MMC) electrically coupled between a first power system and a second power system. The MMC includes an arrangement of switching submodules, and the switching submodules include an arrangement of switching power transistors and capacitors. The MMC also includes a controller configured to inject a common mode frequency signal into a circulating current control loop. The circulating current control loop is relied upon to reduce at least one low frequency component in power used for charging the capacitors in the switching submodules. By injecting the common mode frequency signal into the circulating current control loop, the switching submodules can be switched at higher frequencies, the capacitances of the capacitors in the MMC can be reduced, and the power density of the MMC can be increased.
- Communication and Control in Power Electronics SystemsMitrovic, Vladimir (Virginia Tech, 2021-12-17)The demands of a modern way of life have changed the way power electronics systems work. For instance, the grid has to provide not only the service of delivering electrical energy but also the communication to enable interactions between customers and enable them to be producers of electrical energy, too. Thus, the smart grid has come into existence. The consequence of the smart grid is that consumers could be “smart.” The most obvious consumers are households, so the houses have to also be smart and must be equipped with various power electronics devices for producing and managing electrical energy. Again, all those devices have to communicate somehow and provide data for managing electrical energy in the house. Zoomed in further, novel, state-of-the-art measurement equipment could have been built from different power electronics devices, and communication among them would be necessary for good operation. Zoomed further in, communication among different pieces of power electronics devices (such as converters) could offer benefits such as flexibility, abstraction, and modularity. This thesis provides insight into different communication techniques and protocols used in power electronics systems. A top-down approach presents three different levels of communication used in real-life projects with all the challenges they bring, starting with the smart house, followed by the state-of-the-art impedance measurement unit, and finalizing with internal power electronics building block (PEBB) communication. In the case of a smart house, where the house is equipped with solar panels, charge controllers, batteries, and inverters, communication allows interoperation between different elements of the power electronics system, enabling energy management. Results show the operation of the system and energy management algorithm. A house of this type won first prize at an international competition where energy management was one of the disciplines. The impedance measurement unit consists of different power electronics devices. In this case, too, communication between devices enables the operation of the impedance measurement unit. Communication techniques used here are shown together with measurement results. Finally, inter-PEBB communication has been shown as an approach for interaction among the different elements inside the PEBB, such as controller, GDs, sensors, and actuators. Real-time communication protocol, including all challenges, is described and developed. This approach is shown to enable communication and synchronization among different nodes inside the PEBB. Communication enables all internal elements of the PEBB to be transparent outside the PEBB in the sense that data gathered from them could be reused anywhere else in the system. Also, this approach enables the development of distributed event (time) driven control, hardware and software, abstraction, high modularity, and flexibility. A very important aspect of inter-PEBB communication is synchronization. A simple technique of sharing a clock among the parts of a 6 kV PEBB has been shown.
- A Compact Three-Phase Multi-stage EMI Filter with Compensated Parasitic-Component EffectsChen, Shin-Yu (Virginia Tech, 2023-09-14)With the advent of wide bandgap (WBG) semiconductor devices, the electromagnetic interference (EMI) emissions are more pronounced due to high slew rates in the form of high dv/dt and high di/dt at higher switching frequencies compared to the traditional silicon technology. To comply with the stringent conducted emission requirements, EMI filters are adopted to attenuate the high frequency common mode (CM) and differential mode (DM) noise through the propagation path. However, self and mutual parasitic components are known to degrade the EMI filter performance. While parasitic cancellation techniques have been discussed at length in prior literature, most of them have focused mainly on single phase applications. As such this work focuses on extending the preexisting concepts to three-phase systems. Novel component placement, winding strategy as well as shielding and grounding techniques were developed to desensitize the influence of the parasitic effects on a three-phase multi-stage filter. The effectiveness of the three-phase filter structure employing the proposed methodologies has been validated via noise measurements at the line impedance stabilization network (LISN) in a 15kW rated motor drive system. Consequently, general design guidelines have been formulated for filter topologies with different inductor and capacitor form-factors.
- Comparison and Design of High Efficiency Microinverters for Photovoltaic ApplicationsDominic, Jason (Virginia Tech, 2014-11-14)With the decrease in availability of non-renewable energy sources coupled with the increase in the amount of energy required for the operation of personal electronic devices there has been an increased focus on developing systems that take advantage of renewable energy sources. Renewal energy sources such as photovoltaic (PV) panels have become more popular due to recent developments in PV panel manufacturing that decreases material costs and improves energy harvesting efficiency. Since PV sources are DC sources power conversion stages have to be used in order to interface this power to the existing electrical utility system. The structure of large scale PV systems usually consists of several PV panels connected in series to achieve a high input source voltage that can be fed into a high power centralized DC-AC inverter. The drawback to this approach is that when the PV panels are subjected to less than ideal conditions. If a single PV panel is subjected to drastically less solar irradiation during cloud conditions, then its output power will drop dramatically. Since this panel is series connected with the other PV panels, their current output is also dragged low decreasing the power output of the system. Algorithms that have the power converter operate at different input conditions allow the system to operate at a maximum power point (MPP), however this only allows the system to operate at a higher power point and not the true MPP. To get around this limitation a new PV system implementation was created by giving each panel its own DC-AC power conversion system. This configuration gives each panel the ability to operate at its own MPP increasing the total system energy harvest. Another advantage of the single panel DC-AC microinverter power conversion stage is that the outputs are parallel connected to the utility grid easily allowing the ability to expand the system without having to shut down the entire system. The most prevalent implementation of the microinverter consists of a single power converter that uses the PV low voltage DC and outputs high voltage AC. In order to ensure that the double line AC ripple does not propagate to the PV panel a large bank of electrolytic capacitors are used to buffer the ripple. There is concern that the electrolytic capacitor will degrade over time and affect the system efficiency. To get around having to use electrolytic capacitors a two stage microinverter has been proposed. The two stage microinverter consists of a DC-DC converter that steps up the low DC voltage of the PV panel to high voltage DC and the second stage is a DC-AC inverter that takes the high voltage DC and converts it to high voltage AC. There is a capacitor that connects the two power converter stages called the DC link capacitor which can buffer the double line energy ripple without using electrolytic capacitors. This thesis focuses on the review of several DC-AC inverter topologies suitable for use in PV microinverter systems. Operation capabilities such as common mode noise and efficiency are compared. The main focus of the review is to determine the optimal DC-AC inverter using the performance metrics of cost, efficiency and common mode performance. A 250 W prototype is built for each inverter topology to verify its performance and operation.
- Computer Modeling and Simulation of Power Electronics Systems for Stability AnalysisAhmed, Sara Mohamed (Virginia Tech, 2007-12-05)This works focuses on analyzing ac/dc hybrid power systems with large number of power converters that can be used for a variety of applications. A computer model of a sample power system is developed. The system consists of various detailed/switching models that are connected together to study the sample system dynamic behavior and to set conditions for safe operation. The stability analysis of this type of power systems has been approached using time domain simulations. There are three types of stability analysis that are studied: steady-state, small-signal analysis and large signal analysis. The steady-state stability analysis is done by investigating the nominal operation of the power electronics system proposed. The small-signal stability of this system is studied by running different parametric case studies. First, the safe values of the main system parameters are defined from the view of the stability of the complete system. Then, these different critical parameters of the system are mapped together to predict their influence on the system. The large signal stability is examined through the response of the power system to different types of transient changes. There are different load steps applied to the critical parameters of the system at the maximum or minimum stability boundary limit found by the mapping section. The maximum load step after which the system can recover and remain stable is defined. The other type of large signal stability analysis done is the study of faults. There are different faults to be studied; for example, over voltage, under voltage and over current.
- Control of DC Power Distribution Systems and Low-Voltage Grid-Interface Converter DesignChen, Fang (Virginia Tech, 2017-04-27)DC power distribution has gained popularity in sustainable buildings, renewable energy utilization, transportation electrification and high-efficiency data centers. This dissertation focuses on two aspects of facilitating the application of dc systems: (a) system-level control to improve load sharing, voltage regulation and efficiency; (b) design of a high-efficiency interface converter to connect dc microgrids with the existing low-voltage ac distributions, with a special focus on common-mode (CM) voltage attenuation. Droop control has been used in dc microgrids to share loads among multiple sources. However, line resistance and sensor discrepancy deteriorate the performance. The quantitative relation between the droop voltage range and the load sharing accuracy is derived to help create droop design guidelines. DC system designers can use the guidelines to choose the minimum droop voltage range and guarantee that the sharing error is within a defined range even under the worst cases. A nonlinear droop method is proposed to improve the performance of droop control. The droop resistance is a function of the output current and increases when the output current increases. Experiments demonstrate that the nonlinear droop achieves better load sharing under heavy load and tighter bus voltage regulation. The control needs only local information, so the advantages of droop control are preserved. The output impedances of the droop-controlled power converters are also modeled and measured for the system stability analysis. Communication-based control is developed to further improve the performance of dc microgrids. A generic dc microgrid is modeled and the static power flow is solved. A secondary control system is presented to achieve the benefits of restored bus voltage, enhanced load sharing and high system efficiency. The considered method only needs the information from its adjacent node; hence system expendability is guaranteed. A high-efficiency two-stage single-phase ac-dc converter is designed to connect a 380 V bipolar dc microgrid with a 240 V split-phase single-phase ac system. The converter efficiencies using different two-level and three-level topologies with state-of-the-art semiconductor devices are compared, based on which a two-level interleaved topology using silicon carbide (SiC) MOSFETs is chosen. The volt-second applied on each inductive component is analyzed and the interleaving angles are optimized. A 10 kW converter prototype is built and achieves an efficiency higher than 97% for the first time. An active CM duty cycle injection method is proposed to control the dc and low-frequency CM voltage for grounded systems interconnected with power converters. Experiments with resistive and constant power loads in rectification and regeneration modes validate the performance and stability of the control method. The dc bus voltages are rendered symmetric with respect to ground, and the leakage current is reduced. The control method is generalized to three-phase ac-dc converters for larger power systems.
- Control, Analysis, and Design of SiC-Based High-Frequency Soft-Switching Three-Phase Inverter/RectifierSon, Gibong (Virginia Tech, 2022-11-01)This dissertation presents control, analysis, and design of silicon carbide (SiC)-based critical conduction mode (CRM) high-frequency soft-switching three-phase ac-dc converters (inverter and rectifier). The soft-switching technique with SiC devices grounded in CRM makes the operation of the ac-dc converter at hundreds of kHz possible while maintaining high efficiency with high power density. This is beneficial for rapidly growing fields such as electric vehicle charging, photovoltaic (PV) systems, and uninterruptable power supplies, etc. However, for the soft-switching technique to be practically adopted to real products in the markets, there are a lot of challenges to overcome. In this dissertation, four types of the challenges are carefully studied and discussed to address them. First, the grid-tied inverters used for distributed energy resources, such as PV systems, must continue operating to deliver power to the grid, when it faces flawed grid conditions such as voltage drop and voltage rise. During abnormal grid conditions, delivering constant active power from the inverter to the grid is essential to avoid large voltage ripples on the dc side because it could trigger over-voltage protection or harm the circuitries, eventually shutting down the inverter. Hence, in such cases, unbalanced ac currents need to be injected into the grid. When the grid voltages and the ac currents are not balanced, there is a chance for the CRM soft-switching inverter to lose its soft-switching capability. Continuous conduction mode operation emerges, causing hard-switching where discontinuous conduction mode (DCM) operation is expected. This leads to huge turn-on loss and high dv/dt noise at the active switch's turn-on moment. To eradicate the hard-switching problem, two improved modulation schemes are developed; one with off-time extension in the CRM phase, the other by skipping switching pulses in the DCM phase. The DCM pulse skipping is applied for a variety of grid imbalance cases, and it is proven that it can be a generalized solution for any kinds of unbalanced grid conditions. Second, the CRM soft-switching scheme with 2-channel interleaving achieves high efficiency at heavy load. Nevertheless, the efficiency plunges as the output load is reduced. This is not suitable for PV inverters, which take account of light load efficiency in terms of "weighted efficiency". Small inductor currents at light load cause the switching frequency to soar because of its CRM-based operation characteristic, causing large switching loss. To increase the inductor current dealt with by the first channel, a phase shedding control is proposed. Gate signals for the second channel are not excited, increasing the first channel's inductor current, thus cutting down the first channel's switching frequency. To prevent the unwanted circulating current formed by shared zero-sequence voltage in the paralleled structure, only two phases in the second channel working in high frequency are shed. The proposed phase shedding control achieves a 0.5 to 3.9 % efficiency improvement with light loads. Third, due to the usage of SiC devices, high dv/dt generated at switching nodes over the system parasitic capacitance causes substantial common mode (CM) noise compared to that with Si devices. In this case, a balance technique with PCB winding inductors can effectively reduce the CM noise. First, winding interleaving structure is selected to minimize the eddy current loss in the windings. But the interwinding capacitance caused by the winding interleaving structure aggravates the CM noise. Impact of the interwinding capacitance on the CM noise is analyzed with a new inductor model containing the interwinding capacitance. Then, finally, a novel inductor structure is proposed to remove the interwinding capacitance and to improve the CM noise reduction performance. The soft-switching ac-dc converter built with the final PCB magnetics features almost similar efficiency compared to that with litz-wire inductor and 14 to 18 dB CM noise reduction up to 15 MHz. Lastly, the soft-switching technique is extended to inverters in standalone mode. To meet tight ac voltage total harmonic distortion requirements, a current control in dq-frame is introduced. As for the ac voltage regulation at no-load, on top of the improved phase shedding control, a frequency limiting with fixed frequency DCM method is applied to prevent excessive increase in the switching frequency. Then, how to deal with short-circuit at the output load is investigated. Since the soft-switching modulation violates inductor voltage-second balance during the short-circuit, the modulation method is switched to a conventional sinusoidal PWM at fixed frequency. It is concluded that all the additional requirements for the standalone inverters can be satisfied by the introduced control strategies.
- Current-Transformer Based Gate-Drive Power Supply With Reinforced IsolationHu, Jiewen (Virginia Tech, 2018-05)In recent years, there is a clear trend toward increasing the demand for electric power in high-power applications. High-power converters are making major impacts on these high-power applications. Recent breakthroughs in Silicon Carbide (SiC) materials and fabrication techniques have led to the development of high-voltage, high-frequency power devices, which are at the heart of high-power converters. SiC metal-oxide semiconductor field-effect transistors (MOSFETs) have advantages over silicon (Si) devices due to their higher breakdown voltage, higher thermal capability, and lower on-state resistance. However, their fast switching frequency and high blocking voltage bring challenges to the gate-drive circuit design. The gate driver of SiC-MOSFETs requires a power supply that provides a high-voltage, high-density design, a low input-output capacitance (CI/O) transformer design, good voltage regulation, as well as good resilience to faults to enable safe and fast operation. In this thesis, a power supply that supplies multiple gate drivers for 10 kV SiC MOSFETs is presented. A transformer design approach with a single turn at the primary side is proposed. A 20 kV insulation is achieved by the primary HV cable insulation across a toroid transformer core. The CI/O is designed less than 2 pF to mitigate the Common-Mode (CM) noise. A circuit topology analysis is performed and the inductor/capacitor/capacitor/inductor (LCCL) – inductor/capacitor (LC) circuit is selected. This circuit allows Zero-Voltage Switching (ZVS) at full operation range. A Resonant-Current-Bus (RCB) is built at the transformer primary side to achieve load-independence.
- D-Q Frame Impedance Based Small-signal Stability Analysis of PV Inverters in Distribution GridsTang, Ye (Virginia Tech, 2021-01-18)With development of renewable energies worldwide, power system is seeing higher penetration of Utility-scale photovoltaic (PV) farms at distributed level as well as transmission level. Power electronics converters present negative incremental impedance characteristics at their input while under regulated output control, which brings in the possibility of system instability. Recent evidence suggests that large-scale penetration of PV inverters increases the probability of instability. While IEEE standard 1547 newest version requires PV inverters to have reactive power control, there have been few investigations into the small-signal stability impact of PV inverters on distribution systems especially with reactive power control. In addition, the existing studies either use the conventional way of state space equations and eigenvalues or use time-domain simulation methodology, which are based on the assumptions that detailed models of the grid and the PV inverters are accessible. Different from the previous literatures, this research employs Generalized Nyquist Criterion (GNC) method based on measured impedances in d-q frames at connection interfaces. GNC method has the advantage that interconnection stability can be judged without knowing the grid and PV generator model details. This work first demonstrates the advantage of volt-var droop mode control among all different local reactive power control modes for PV inverters in the aspects of static impact on grid voltage profiles and power loss in a 12kV test-bed distribution system. Then it is discovered that d-q frame impedance of PV inverter under volt-var droop mode control shows a significant difference from other reactive power control modes. The d-q frame impedance derived from the small-signal model of PV generator is validated by both MATLAB simulation results and hardware experiments. Based on the d-q frame impedances, GNC is utilized to analyze the stability connection of a single PV farm and multiple PVs into the grid. GNC stability assessment results match with time-domain simulations and reveal the stability problem related to volt-var droop mode control. Furthermore, considering the unbalance of the distribution system, a new impedance model in d-q frame is proposed to capture both the dynamics of PV inverter operating in unbalanced points and the dynamics of three-phase unbalanced grid. The new impedance model is a combination of positive-negative sequence impedance and conventional d-q frame impedance. A procedure is designed for the measurement of the extended d-q frame impedance and the GNC application to predict small-signal stability of the unbalanced grid, which are justified by both time domain simulation and hardware experiments.
- D-q impedance identification in three phase systems using multi-tone perturbationZhou, Bo (Virginia Tech, 2013-05-31)In electric power systems, the existence of constant power loads such as output-regulated power converters may bring instability problem to AC or DC distributed systems. Impedance based stability criteria has been proven a good tool for small-signal stability analysis. This works focuses on the developing of a comprehensive software tool which can extract DC or three phase AC impedances, and apply stability analysis. An algorithm is designed to select FFT window and adjust perturbation frequencies. This feature enables the software to accurately measure impedances even in existence of system line harmonics. Furthermore, multi-tone approach is developed to improve simulation time. The complete software tool is tested with simulation models and experiment results, to show the effectiveness. When multi-tone approach is applied on nonlinear loads, it gives incorrect results. The reason is that perturbation frequency will have overlapping with side-band harmonics. An algorithm is designed to avoid this problem. The algorithm is tested with 12-pulse diode rectifier simulation model, and 6-pulse diode rectifier simulation model and experimental test bed. Both simulation and experiment results verifies the concept.
- DC Fault Current Analysis and Control for Modular Multilevel ConvertersYu, Jianghui (Virginia Tech, 2016-11-28)Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need for electric power by the loads. The Medium-Voltage DC (MVDC) concept can be an optimal solution. On the other hand, the Modular Multilevel Converter (MMC) is an attractive converter topology choice, as it has advantages such as excellent harmonic performance, distributed energy storage, and near ideal current and voltage scalability. The fault response, on the other hand, is a big challenge for the MVDC distribution systems and the traditional MMCs with the Half-Bridge submodule configuration, especially when a DC short circuit fault happens. In this study, the fault current behavior is analyzed. An alternative submodule topology and a fault operation control are explored to achieve the fault current limiting capability of the converter. A three-phase SiC-based MMC prototype with the Full-Bridge configuration is designed and built. The SiC devices can be readily adopted to take advantage of the wide-bandgap devices in MVDC applications. The Full-Bridge configuration provides additional control and energy storage capabilities. The full in-depth design, controls, and testing of the MMC prototype are presented, including among others: component selection, control algorithms, control hardware implementation, pre-charge and discharge circuits, and protection scheme. Systematical tests are conducted to verify the function of the converter. The fault current behavior and the performance of the proposed control are verified by both simulation and experiment. Fast fault current clearing and fault ride-through capability are achieved.
- Design and Construction of Controls for a Kv/Mva Class Power Electronics Testing FacilityPerdue, Clinton L. (Virginia Tech, 2006-09-08)In order to facilitate research and testing of kV/MVA class power electronics systems, Virginia Tech has constructed the High-Power lab facility. This lab supports testing of equipment operating at up to 1.3 MW, with maximum supply ratings of 4,160 V or 480 A, depending on how the system is configured. When operated as a recirculating power ring, the system will make minimal demands on utilities. An industrial supervisory, control, and data acquisition (SCADA) system will be used to control the facility. In this paper we will detail the lab design and give insight to the decisions behind it, with an aim toward helping the reader in their own similar effort.